Software assisted acceleration in cryptographic queue processing

Abstract

A system and method for efficiently processing security service requests are described. In various implementations, an integrated circuit includes at least one or more processors with a dedicated security processor and on-chip memory that has a higher security level than off-chip memory. During the processing of security service requests, the security processor receives multiple commands with each including a cryptographic function. The security processor identifies one or more issue groups of commands based at least upon data dependencies and shared source data. When the security processor determines an issued command is in a given issue group, the security processor issues a next command from remaining commands in the given issue group. Otherwise, the security processor issues an immediately next in-order command after the issued command.