Power state prediction using machine learning circuitry

Abstract

Techniques are disclosed relating to performing a corrective action in response to certain detected conditions. In disclosed embodiments, clock circuitry is configured to provide a clock signal to processor circuitry. In some embodiments, power monitor circuitry is configured to generate activity information based on activity of different portions of the processor circuitry during operation of the processor circuitry. In some embodiments, machine learning circuitry is configured to predict a future power state of the processor circuitry based on inputs that include the activity information. In some embodiments, control circuitry is configured to, in response to the machine learning circuitry predicting a power state of the processor that falls within a set of one or more target predicted power states, control the clock circuitry to reduce the frequency of the clock signal provided to the processor circuitry.