The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2025
Filed:
Jun. 14, 2023
Hcl America Inc., Sunnyvale, CA (US);
Manickam Muthiah, Shrewsbury, MA (US);
Karthikeyan Keelapandal Sundaram, Chennai, IN;
Razi Abdul Rahim, Willowbrook, IL (US);
Abstract
A method for simultaneously testing multiple Device Under Test (DUT) internal blocks is disclosed. The method includes receiving by a reconfigurable internal buffer of a DUT, an input stimulus corresponding to at least one of a plurality of DUT internal blocks; selecting, via a control register, one or more DUT internal blocks from the plurality of DUT internal blocks to perform testing based on the input stimulus. The method to select the one or more DUT internal blocks includes enabling control bits of at least one multiplexer associated with the one or more DUT internal blocks. The method includes sending, by the reconfigurable internal buffer, the input stimulus corresponding to each of the one or more DUT internal blocks; testing the one or more DUT internal blocks based on the corresponding input stimulus; and generating, by each of the one or more DUT internal blocks, a corresponding output.