The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2025

Filed:

Jan. 07, 2022
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Ferdinando Iucolano, Gravina di Catania, IT;

Alfonso Patti, Tremestieri Etneo, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/02 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/17 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 64/23 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 30/4755 (2025.01); H01L 21/0254 (2013.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/307 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01); H10D 64/256 (2025.01); H10D 64/513 (2025.01);
Abstract

A normally-off electronic device, comprising: a semiconductor body including a heterostructure that extends over a buffer layer; a recessed-gate electrode, extending in a direction orthogonal to the plane; a first working electrode and a second working electrode at respective sides of the gate electrode; and an active area housing, in the on state, a conductive path for a flow of electric current between the first and second working electrodes. A resistive region extends at least in part in the active area that is in the buffer layer and is designed to inhibit the flow of current between the first and second working electrodes when the device is in the off state. The gate electrode extends in the semiconductor body to a depth at least equal to the maximum depth reached by the resistive region.


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