The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2025

Filed:

Feb. 03, 2022
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Toshihisa Hyakudai, San Diego, CA (US);

Junya Yamada, Kanagawa, JP;

Satoshi Ota, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/00 (2006.01); G10L 19/02 (2013.01); H03L 7/18 (2006.01); H04L 7/00 (2006.01); H04L 7/06 (2006.01); H04L 25/00 (2006.01); H04L 69/22 (2022.01);
U.S. Cl.
CPC ...
H04L 7/0008 (2013.01); G10L 19/02 (2013.01); H03L 7/18 (2013.01); H04L 7/06 (2013.01); H04L 69/22 (2013.01);
Abstract

Communication apparatus with correct audio signal regeneration are disclosed. In one example, a communication apparatus includes a counter that counts the number of a predetermined reference clock included in one cycle of a divided signal of an audio master clock with a frequency that is equal to a product of a frequency of a sampling clock for sampling of an audio signal and a multiplier on the basis of the audio master clock, a ratio of division of the divided signal and the predetermined reference clock. A packet generator generates a packet including the counted number counted, a bit width of SD (Serial Data) conforming to an I2S standard, the frequency of the sampling clock, the ratio of division of the divided signal to the audio master clock, a frequency ratio of the frequency of the audio master clock to the frequency of the sampling clock, and the SD.


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