The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2025

Filed:

Apr. 29, 2024
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Abhinesh Mishra, Karnataka, IN;

Shishir Kumar, Karnataka, IN;

Ritu Singh, Karnataka, IN;

Amjad Inamdar, Karnataka, IN;

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01); H04L 43/0829 (2022.01);
U.S. Cl.
CPC ...
H04L 1/0042 (2013.01); H04L 43/0835 (2013.01);
Abstract

An intelligent forward error correction (iFEC) method and system are automatically triggered and started for providing forward error correction for applications when packet loss is predicted to be more than a threshold packet loss level during a prescribed interval and the actual packet loss is more than a threshold level. Similarly, the intelligent FEC method and system may be automatically disabled when packet loss is predicted to be less than the threshold level during a prescribed interval. If prescribed bandwidth of a transmission uplink through which application data packets will pass will be slowed or choked by use of iFEC, then iFEC may be disabled or stopped to prevent further congestion in the uplink. That is, according to examples, iFEC is started and stopped based on predicted packet loss and uplink/bandwidth health as opposed to simply operating forward error correction in a 'always on' or manually provisioned manner.


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