The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2025
Filed:
Apr. 12, 2023
Cisco Technology, Inc., San Jose, CA (US);
Bibhu Prasad Das, Philadelphia, PA (US);
Abhishek Bhat, Allentown, PA (US);
Kadaba Lakshmikumar, Hillsborough, NJ (US);
Romesh Kumar Nandwana, Chapel Hill, NC (US);
CISCO TECHNOLOGY, INC., San Jose, CA (US);
Abstract
A charge-pump based low dropout (LDO) regulator is provided that overcomes latch-up issues. The LDO regulator is a high PSR low noise LDO regulator that uses a latch-up mitigated charge-pump voltage doubler which includes a N-type metal-oxide-semiconductor field-effect transistor (MOSFET), NMOS, pass transistor. This LDO regulator architecture may be used to provide a very low-noise supply regulated output voltage with high power supply rejection for an on-chip low jitter oscillator. Latch-up is mitigated using control circuitry and a power supply timing sequence. This scheme ensures that parasitic diodes associated with various transistors in the regulator are not forward biased.