Non-volatile memory device, storage device having the same and operating method of non-volatile memory device

Abstract

A non-volatile memory device includes a memory cell array including memory cells coupled to word lines, a boost circuit that receives an external power supply voltage and generate a boosted voltage based on the external power supply voltage, a regulator that generates a regulated voltage based on the external power supply voltage, and a control logic that controls word line voltages provided to the word lines. The control logic performs plural program loops in a program operation for the memory cell array. The control logic provides an adjacent word line voltage to an adjacent word line that is adjacent to a selected word line. In a first section of the program loops, the control logic provides the regulated voltage as the adjacent word line voltage, and in a second section of the program loops, the control logic provides the boosted voltage as the adjacent word line voltage.