The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2025

Filed:

Apr. 03, 2024
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Timothy David Anderson, University Park, TX (US);

Duc Quang Bui, Grand Prairie, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3206 (2019.01); G06F 1/3287 (2019.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30036 (2013.01); G06F 1/3206 (2013.01); G06F 1/3287 (2013.01); G06F 9/30014 (2013.01); G06F 9/30018 (2013.01); G06F 9/30038 (2023.08); G06F 9/30072 (2013.01); G06F 9/30109 (2013.01); G06F 9/30112 (2013.01); G06F 9/3013 (2013.01); G06F 9/3887 (2013.01); Y02D 10/00 (2018.01);
Abstract

In an embodiment, a circuit includes a data path including at least a first lane of a first width and a second lane of a second, larger, width; an execution unit to execute a first instruction on data of the first width or less using the first lane, and to execute a second instruction on data greater than the first width and less than or equal to the second width using the second lane; and a control register that stores a value indicating which of the first and second lanes to be used in instruction execution by the execution unit. The circuit is configured to, based on the value stored in the control register, power off the first lane when the execution unit executes the second instruction but not the first instruction, and power off the second lane when the execution unit executes the first instruction but not the second instruction.


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