The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Mar. 31, 2023
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Weiyun Huang, Beijing, CN;

Yudiao Cheng, Beijing, CN;

Pinchao Gu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 50/844 (2023.01); H10K 59/122 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01); H10K 102/00 (2023.01);
U.S. Cl.
CPC ...
H10K 50/844 (2023.02); H10K 59/122 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02); H10K 2102/351 (2023.02);
Abstract

This disclosure relates to a display panel and a manufacturing method thereof, and a display device. The display panel includes a display area, an opening area and an isolation area located between the display area and the opening area and surrounding the opening area, and includes: a base substrate; a driving circuit layer including a thin film transistor and a storage capacitor that are formed on the base substrate and located in the display area, the thin film transistor including a gate electrode, a first gate insulating layer, an interlayer dielectric layer and source and drain electrodes that are sequentially formed, the storage capacitor including a first electrode plate on the same layer as the gate electrode, and a second electrode plate; a first isolation column formed on the base substrate and located in the isolation area.


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