The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Nov. 03, 2020
Applicant:

Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, CN;

Inventors:

Xin Ou, Shanghai, CN;

Wenhui Xu, Shanghai, CN;

Tiangui You, Shanghai, CN;

Zhenghao Shen, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/02 (2006.01); H10D 30/60 (2025.01); H10D 30/63 (2025.01); H10D 62/10 (2025.01); H10D 62/82 (2025.01); H10D 62/832 (2025.01);
U.S. Cl.
CPC ...
H10D 30/63 (2025.01); H01L 21/02002 (2013.01); H10D 30/611 (2025.01); H10D 62/105 (2025.01); H10D 62/82 (2025.01); H10D 62/8325 (2025.01);
Abstract

The present disclosure provides a gallium oxide semiconductor structure, a vertical gallium oxide-based power device, and a preparation method. An unintentionally doped gallium oxide layer () is transferred to a highly doped and highly thermally conductive heterogeneous substrate () by bonding and thinning; then a heavily doped gallium oxide layer () is formed on the gallium oxide layer by treating and ion implantation, thereby preparing the gallium oxide semiconductor structure including the heterogeneous substrate (), the gallium oxide layer (), and the heavily doped gallium oxide layer () stacked in sequence. In the vertical gallium oxide-based power device prepared on the basis of the gallium oxide semiconductor structure, the gallium oxide layer () is a thicker intermediate layer and a carrier concentration of the gallium oxide layer () is less than that of the heavily doped gallium oxide layer (). Therefore, the breakdown voltage of the device is also increased through structural design. The highly thermally conductive heterogeneous substrate () improves the heat dissipation performance of the device. The device with multiple Fin structures provides a large amount of current.


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