The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Dec. 11, 2023
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Hyung Jin Choi, Gyeonggi-do, KR;

Se Chun Park, Gyeonggi-do, KR;

In Gon Yang, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/08 (2006.01); G11C 8/14 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/08 (2013.01); G11C 16/102 (2013.01);
Abstract

A memory device including: a memory device may include: a memory cell array, and a controller configured to perform program loops each comprising a voltage application operation, a word line holding operation, and a verification operation until a program operation for selected memory cells is successful, during the word line holding operation, apply a holding pass voltage having a higher level than a ground voltage to each of first word lines having a program state and second word lines having an erase state, which belong to unselected word lines among a plurality of word lines, during the verification operation, apply a verification pass voltage having a higher level than the holding pass voltage to K word lines that belong to the first word lines and the second word lines, and apply the holding pass voltage to remaining word lines except the K word lines, among the second word lines.


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