The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Sep. 07, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

In-Su Kim, Yongin-si, KR;

Hyun Jin Choi, Suwon-si, KR;

Alain Tran, Hwaseong-si, KR;

Beom Kyu Shin, Seongnam-si, KR;

Woo Seong Cheong, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01); G11C 16/32 (2006.01);
U.S. Cl.
CPC ...
G11C 16/107 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01);
Abstract

A memory controller includes an interface and a control module. The interface interfaces with a memory device which includes a plurality of dies that each include a plurality of blocks. The control module groups a plurality of blocks included in different dies and manages the plurality of blocks as a super block. The control module performs scheduling to alternately perform a program on a part of an Nth super block, wherein N is a natural number, and a phased erase on an N+1st super block, and the control module completes the program on the Nth super block and the erase on the Nth super block before the program on the N+1st super block starts.


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