The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Dec. 07, 2023
Applicants:

Robert Bosch Gmbh, Stuttgart, DE;

Fraunhofer-gesellschaft Zur Förderung Der Angewandten Forschung E. V., Munich, DE;

Inventors:

Tobias Kirchner, Stuttgart, DE;

Taha Soliman, Stuttgart, DE;

Thomas Kaempfe, Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G06F 7/544 (2006.01); G11C 11/54 (2006.01);
U.S. Cl.
CPC ...
G06F 17/16 (2013.01); G06F 7/5443 (2013.01); G11C 11/54 (2013.01); G06F 2207/4824 (2013.01);
Abstract

The disclosure relates to a method for mapping an input vector to an output vector by means of a matrix circuit which has memory cells arranged in a matrix in a plurality of rows and a plurality of columns and first, second and third lines, each memory cell having an adjustable memory state, is connected to the first line () of the corresponding row, is connected to the second and third lines of the corresponding column and is set up to generate an electrical current (I, I, I) depending on the memory state and voltages applied to the first, second and third lines, is connected to the second and third lines of the corresponding column and is arranged to conduct an electric current (I, I, I) into the third line () as a function of the memory state and voltages applied to the first, second and third lines, each memory cell having a semiconductor switching element () with a control terminal which is connected to the second line () of the corresponding column; wherein input voltages (U, U, U) corresponding to components of the input vector are applied () to the first lines; wherein for each column: a ramp voltage (V, V, V) is applied () to the second line assigned to the column, the level of which is increased with time (); a total current is detected at the third line assigned to the column and a time period elapsed since a start time of the level increase of the corresponding ramp voltage is determined () until the magnitude of the total current reaches a certain current magnitude threshold (Ig) (); and a component of the output vector corresponding to the column is determined () based on the elapsed time period (t, t, t).


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