The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Aug. 02, 2023
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Riyas Noorudeen Remla, Singapore, SG;

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); G06F 1/08 (2013.01);
Abstract

A system for clock variation measurement includes a first clock counter circuit configured to generate a plurality of first counts of a first clock signal, a second clock counter circuit configured to generate a plurality of second counts of a second clock signal, a first synchronizer circuit configured to synchronize the plurality of first counts according to a third clock signal, and a second synchronizer circuit configured to synchronize the plurality of second counts according to the third clock signal. The system includes a difference circuit configured to generate a plurality of differences from respective count pairs as synchronized. The system includes a variation circuit configured to generate a variation signal indicating an amount of variation between the first clock signal and the second clock signal based, at least in part, on the plurality of differences.


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