The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Nov. 20, 2020
Applicant:

Ucl Business Ltd., London, GB;

Inventors:

Anthony Kenyon, London, GB;

Adnan Mehonic, London, GB;

Wing Ng, London, GB;

Assignee:

UCL Business Ltd., London, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 70/00 (2023.01); H10B 63/00 (2023.01);
U.S. Cl.
CPC ...
H10N 70/023 (2023.02); H10B 63/80 (2023.02); H10N 70/063 (2023.02); H10N 70/841 (2023.02); H10N 70/883 (2023.02);
Abstract

A method for manufacturing a memory resistor device. A first layer of a dielectric material is deposited onto a first electrode. A subsection of the first layer of the dielectric material is removed to expose one or more edges of the dielectric material and a second layer of the dielectric material is deposited to create one or more boundaries between the one or more edges of the first layer of the dielectric material and the second layer of the dielectric material. A second electrode is provided, wherein the one or more boundaries between the one or more edges of the first layer of the dielectric material and the second layer of the dielectric material extend at least partially from the first electrode to the second electrode.


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