The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Jun. 08, 2020
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventors:

Tohru Okabe, Sakai, JP;

Shinsuke Saida, Sakai, JP;

Shinji Ichikawa, Sakai, JP;

Shoji Okazaki, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/80 (2023.01); H10K 59/12 (2023.01); H10K 59/35 (2023.01); H10K 71/13 (2023.01);
U.S. Cl.
CPC ...
H10K 59/8723 (2023.02); H10K 59/1201 (2023.02); H10K 59/353 (2023.02); H10K 71/135 (2023.02); H10K 59/8731 (2023.02);
Abstract

A display device includes: a substrate, a thin film transistor layer; a display region and a frame region; a light-emitting element layer including a first electrode, a light-emitting layer, and a second electrode in this order from the thin film transistor layer side; a peripheral electrode; an edge cover configured to cover an edge of the first electrode and an edge of the peripheral electrode; a plurality of spacers provided in the display region and the frame region; and a sealing layer. The plurality of spacers includes a plurality of third spacers provided on the edge cover in the frame region. A plurality of third spacer groups including a plurality of adjacent third spacers of the plurality of third spacers is provided. Each of the plurality of third spacer groups is provided in parallel to each other and in a direction intersecting an edge of the display region.


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