The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Nov. 19, 2020
Applicant:

Sanyo Electric Co., Ltd., Osaka, JP;

Inventors:

Junya Yano, Hyogo, JP;

Tomonori Kunimitsu, Hyogo, JP;

Masato Nakayama, Hyogo, JP;

Taisuke Hamada, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B60K 1/04 (2019.01); B60L 53/60 (2019.01); H01M 10/48 (2006.01); H01M 50/209 (2021.01); H01M 50/284 (2021.01); H01M 50/298 (2021.01); H01M 50/512 (2021.01);
U.S. Cl.
CPC ...
H01M 50/284 (2021.01); B60L 53/60 (2019.02); H01M 10/482 (2013.01); H01M 50/209 (2021.01); H01M 50/298 (2021.01); H01M 50/512 (2021.01); H01M 2220/20 (2013.01);
Abstract

In a battery module, end plates disposed at both ends of battery stack are connected by binding bars. Electrode terminals of respective battery cells and voltage detection circuit of electronic circuit block are connected by a plurality of voltage detection lines. Electronic circuit block is disposed on an outer surface of end plate and fixes one connector formed by linearly disposing a plurality of connecting terminals to which voltage detection lines are connected to circuit board on which voltage detection circuit is mounted. Voltage detection circuit is provided with a plurality of input terminals arranged in a linear manner. In circuit board, connecting terminal and input terminal disposed at opposite positions are connected by a plurality of connection lines. A cell voltage of each battery cell is input from connection line to adjacent input terminals.


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