The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Dec. 29, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Tian Shen, Clifton Park, NY (US);

Kevin W. Brew, Niskayuna, NY (US);

Heng Wu, Guilderland, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G06F 17/16 (2006.01); G11C 7/12 (2006.01); G11C 7/16 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1012 (2013.01); G06F 17/16 (2013.01); G11C 7/1063 (2013.01); G11C 7/109 (2013.01); G11C 7/12 (2013.01); G11C 7/16 (2013.01); G11C 8/08 (2013.01);
Abstract

A plurality of bit lines corresponding to elements of an input vector intersect a plurality of word lines and a plurality of memristive cells are located at the intersections. At least three cells are grouped together to represent a single matrix element. At least three word lines correspond to each element of an output vector. An A/D converter is coupled to each of the word lines, and for each line, except a first, in each group, a shifter has an input coupled to one of the A/D converters. For each group, an addition-subtraction block adds the output of the A/D converter coupled to the first one of the word lines to outputs of each of the shifters except that for a last one of the word lines, subtracts the output of the last shifter, and outputs a corresponding element of an output vector.


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