The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Mar. 12, 2024
Applicant:

Tianma Advanced Display Technology Institute (Xiamen) Co., Ltd., Xiamen, CN;

Inventor:

Yingteng Zhai, Xiamen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); G09G 3/20 (2006.01); G09G 3/32 (2016.01);
U.S. Cl.
CPC ...
G09G 3/2081 (2013.01); G09G 3/2011 (2013.01); G09G 3/2014 (2013.01); G09G 3/32 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2310/062 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0633 (2013.01); G09G 2320/064 (2013.01);
Abstract

Provided are a display panel, a driving method thereof, and a display device. The display panel includes pixel circuits and light-emitting elements. A pixel circuit includes an amplitude modulation circuit and a pulse width modulation circuit. The amplitude modulation circuit includes an amplitude driving sub-module and an amplitude reset sub-module. The amplitude reset sub-module is configured to transmit a first reset signal to a control terminal of the amplitude driving sub-module. The pulse width modulation circuit includes a pulse width driving sub-module and a pulse width reset sub-module. The pulse width reset sub-module is configured to transmit a second reset signal to a control terminal of the pulse width driving sub-module. The voltage value of the first reset signal is Vref1. The voltage value of the second reset signal is Vref2. Vref1≠Vref2.


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