The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Jun. 30, 2016
Applicant:

University of Virginia Patent Foundation, Charlottesville, VA (US);

Inventors:

Ke Wang, Charlottesville, VA (US);

Elaheh Sadredini, Charlottesville, VA (US);

Kevin Skadron, Charlottesville, VA (US);

Assignee:

University of Virginia Patent Foundation, Charlottesville, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 7/01 (2023.01); G06N 5/047 (2023.01); G06V 10/94 (2022.01);
U.S. Cl.
CPC ...
G06N 7/01 (2023.01); G06N 5/047 (2013.01); G06V 10/955 (2022.01);
Abstract

A hardware accelerated solution of the SPM (Sequential Pattern Mining) is proposed using Micron's Automata Processor (AP), a hardware implementation of non-deterministic finite automata (NFAs) The Generalized Sequential Pattern (GSP) algorithm for SPM searching exposes massive parallelism, and is therefore well-suited for AP acceleration. The multi puss pruning strategy of the GSP is implemented is the APs fast reconfigurability. A generalized automaton structure is proposed by flattening sequential patterns to simple strings to reduce compilation time and to minimize overhead of reconfiguration. Up to 90× and 29× speedups are achieved by the AP-accelerated GSP on six real-world datasets, when compared with the optimized multicore CPU (Central Processing Unit) and GPU (Graphics Processing Unit) GSP implementations, respectively. The proposed CPU-AP solution also outperforms the state-of-the-art PrefixSpan and SPADE (Sequential PAttern Discovery using Equivalence classes algorithms on multicore CPU by up to 452× and 49× speedups.


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