The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Dec. 04, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Xiao Sun, Pleasantville, NY (US);

Ankur Agrawal, Chappaqua, NY (US);

Kailash Gopalakrishnan, New York, NY (US);

Naigang Wang, Ossining, NY (US);

Chia-Yu Chen, White Plains, NY (US);

Jiamin Ni, Yorktown Heights, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/08 (2023.01); G06F 7/499 (2006.01); G06F 17/16 (2006.01); G06N 3/063 (2023.01);
U.S. Cl.
CPC ...
G06N 3/08 (2013.01); G06F 7/499 (2013.01); G06F 17/16 (2013.01); G06N 3/063 (2013.01);
Abstract

An apparatus includes a floating-point gradient register; an integer register; a memory bank; and an array of processing units. Each of the units includes a plurality of binary shifters having an integer input configured to obtain corresponding bits of a 4-bit integer multiplicand, and a shift-specifying input configured to obtain corresponding bits in an exponent field of a 4-bit floating point multiplier. The multiplier is specified in a mantissaless four-bit floating point format including a sign bit, three exponent bits, and no mantissa bits. An adder tree has a plurality of inputs coupled to outputs of the plurality of shifters, and a rounder has an input coupled to an output of the adder tree. The integer inputs are connected to the integer register; the shift-specifying inputs are connected to the floating-point gradient register; and outputs of the rounders are coupled to the memory bank.


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