The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Oct. 19, 2022
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Ofir Ezrielev, Be'er Sheva, IL;

Nadav Azaria, Meitar, IL;

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/343 (2020.01); G06F 15/177 (2006.01); G06F 30/331 (2020.01); G06N 3/045 (2023.01);
U.S. Cl.
CPC ...
G06F 30/343 (2020.01); G06F 15/177 (2013.01); G06F 30/331 (2020.01); G06N 3/045 (2023.01);
Abstract

In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may execute a process; provide input data to the process as the process executes; receive output data from the process as the process executes; after executing the process, determine a neural network based at least on the input data to the process and the output data from the process; determine multiple binary neural networks from the neural network; determine a network of multiple logic gates based at least on the multiple binary neural networks of the neural network; and configure an integrated circuit based at least on the network of the multiple logic gates. For example, the integrated circuit may include at least one of a field programmable gate array, an application specific integrated circuit, a programmable array logic, and a complex logic device.


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