Three-dimensional semiconductor memory device and electronic system including the same

Abstract

A three-dimensional semiconductor device may include a substrate including a cell array region and a contact region, a stack structure including interlayer dielectric layers and gate electrodes, a source structure, and a mold structure between the substrate and the stack structure. First vertical channel structures are on the cell array region in vertical channel holes. Each of the first vertical channel structures may include a first barrier pattern, a data storage pattern, and a vertical semiconductor pattern, which are sequentially layered on an inner side surface of one of the vertical channel holes. The mold structure may include a first buffer insulating layer, a first semiconductor layer, a second buffer insulating layer, and a second semiconductor layer sequentially stacked on the substrate. The source structure may be in physical contact with a portion of a side surface of the vertical semiconductor pattern.