The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Jun. 06, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Sayyed Karen Khatamifard, Bellevue, WA (US);

Chenfan Sun, Shoreline, WA (US);

Alon Yaakov, Raanana, IL;

Husam Khashiboun, Peqiin, IL;

Jeffrey D Marker, Pleasant View, UT (US);

Saman Naderiparizi, Seattle, WA (US);

Ramana V Rachakonda, Austin, TX (US);

Rohit K Gupta, Saratoga, CA (US);

Assignee:

APPLE INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 9/48 (2006.01); G06F 9/54 (2006.01); G06N 3/04 (2023.01);
U.S. Cl.
CPC ...
G06N 3/04 (2013.01); G06F 9/4881 (2013.01); G06F 9/5016 (2013.01); G06F 9/5038 (2013.01); G06F 9/544 (2013.01); G06F 2209/5017 (2013.01);
Abstract

Embodiments relate to streaming convolution operations in a neural processor circuit that includes a neural engine circuit and a neural task manager. The neural task manager obtains multiple task descriptors and multiple subtask descriptors. Each task descriptor identifies a respective set of the convolution operations of a respective layer of a set of layers. Each subtask descriptor identifies a corresponding task descriptor and a subset of the convolution operations on a portion of a layer of the set of layers identified by the corresponding task descriptor. The neural processor circuit configures the neural engine circuit for execution of the subset of the convolution operations using the corresponding task descriptor. The neural engine circuit performs the subset of the convolution operations to generate output data that correspond to input data of another subset of the convolution operations identified by another subtask descriptor from the list of subtask descriptors.


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