The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 07, 2025
Filed:
Nov. 01, 2023
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Deepak Kumar Poddar, Bengaluru, IN;
Soyeb Nagori, Bengaluru, IN;
Hrushikesh Tukaram Garud, Parbhani, IN;
Pramod Kumar Swami, Bengaluru, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G06F 7/523 (2006.01); G06F 9/50 (2006.01); G06F 18/22 (2023.01); G06V 10/75 (2022.01);
U.S. Cl.
CPC ...
G06F 17/16 (2013.01); G06F 7/523 (2013.01); G06F 9/5027 (2013.01); G06F 18/22 (2023.01); G06V 10/75 (2022.01);
Abstract
A hardware accelerator is configured to perform matrix multiplication and/or additional operations to optimize keypoint matching. A sum of squared error (SSE) calculation may be determined by utilizing the hardware accelerator to perform matrix multiplication to obtain a cost matrix for two sets of keypoint descriptors from two images. The hardware accelerator may determine a best cost calculation for each keypoint in each direction, which is utilized to perform keypoint matching.