The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

May. 04, 2023
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Hyung Jin Choi, Icheon-si, KR;

Gwi Han Ko, Icheon-si, KR;

Chan Hui Jeong, Icheon-si, KR;

Se Chun Park, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/0659 (2013.01);
Abstract

A memory device includes: a plurality of memory cells; a peripheral circuit configured to perform a plurality of program loops each including a program voltage apply operation of applying a program voltage to selected memory cells, and a verify operation of verifying a program state of the selected memory cells; and a control logic configured to control the peripheral circuit to apply program voltages increasing in a step-wise manner by a first step voltage in program loops in a first state, and increasing by a second step voltage that is lower than the first step voltage in program loops in a second state that occur after the program loops in the first state. The first state and the second state of the program loops are determined based on when a verify operation on a program state having a highest threshold voltage is performed.


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