The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

May. 10, 2024
Applicant:

Panasonic Intellectual Property Corporation of America, Torrance, CA (US);

Inventors:

Joachim Loehr, Hessen, DE;

Prateek Basu Mallick, Hessen, DE;

Rikin Shah, Hessen, DE;

Hidetoshi Suzuki, Kanagawa, JP;

Takako Hori, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 72/044 (2023.01); H04L 1/00 (2006.01); H04W 8/02 (2009.01); H04L 1/1607 (2023.01); H04L 27/34 (2006.01); H04W 80/02 (2009.01); H04W 88/16 (2009.01);
U.S. Cl.
CPC ...
H04W 72/0466 (2013.01); H04L 1/0078 (2013.01); H04W 8/02 (2013.01); H04L 1/1664 (2013.01); H04L 27/345 (2013.01); H04W 80/02 (2013.01); H04W 88/16 (2013.01);
Abstract

Provided are systems and methods for transmitting data over a wireless channel from a data transmitting node to a data receiving node in a communication system. The data transmitting node comprises second-layer processing circuitry for receiving at least one second-layer SDU, to be mapped onto a resource allocated for data transmission, and for generating a second-layer PDU, including the at least one second-layer SDU and at least one second-layer control element, and first-layer processing circuitry for receiving the second-layer PDU generated by the second-layer processing circuitry and for mapping the second-layer PDU onto the resource allocated for data transmission. The data receiving node comprises first-layer processing circuitry for de-mapping at least one second-layer PDU, and second layer processing circuitry for receiving and parsing the second-layer PDU demapped by the first-layer processing circuitry, the second-layer PDU including at least one second-layer SDU, and at least one second-layer control element.


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