Digital pixel architecture supporting low power and high dynamic range operation having a counter that stops counting pulses in response to detecting a voltage on a capacitor exceeding a threshold

Abstract

A system includes a focal plane array having multiple pixel circuit elements. Each pixel circuit element includes a photodetector configured to generate an electrical current based on received illumination. Each pixel circuit element also includes a capacitor configured to be charged by the electrical current and generate a voltage. Each pixel circuit element further includes a controller configured to sense whether the voltage on the capacitor exceeds a threshold during a sampling period. In addition, each pixel circuit element includes a timer configured to generate an estimate or measure of an amount of time within the sampling period during which the voltage on the capacitor does not exceed the threshold.