The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Mar. 24, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sadegh Yazdanshenas, Toronto, CA;

Jeffrey Chromczak, Toronto, CA;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2020.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/177 (2013.01); H03K 19/20 (2013.01);
Abstract

An integrated circuit includes a programmable logic circuit and freeze circuitry coupled to receive a freeze signal and a control signal. The integrated circuit also includes a logic circuit coupled to receive an output signal of the programmable logic circuit. The logic circuit is also coupled to receive an output signal of the freeze circuitry. The freeze circuitry causes an output signal of the logic circuit to be in a predefined logic state in response to the freeze signal being asserted during power-up of the integrated circuit. The integrated circuit also includes clear circuitry that asserts the control signal in response to a clear signal being asserted after the power-up of the integrated circuit. The freeze circuitry causes the output signal of the logic circuit to be in the predefined logic state in response to the control signal being asserted.


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