The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Nov. 21, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Charles Rimbert-Riviere, Soest, DE;

Arne Eilers, Soest, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 21/48 (2006.01); H01L 23/24 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/373 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01); H01L 21/4846 (2013.01); H01L 22/12 (2013.01); H01L 22/32 (2013.01); H01L 23/24 (2013.01); H01L 23/3735 (2013.01); H01L 23/49811 (2013.01); H01L 24/48 (2013.01); H01L 2224/48225 (2013.01); H01L 2924/153 (2013.01);
Abstract

A method of producing a power semiconductor module includes providing a power electronics carrier that includes a structured metallization layer disposed on an electrically insulating substrate layer, performing a production step of the power semiconductor module using the power electronics carrier, using a sensor to obtain crack information during the production step, the crack information comprising information about whether one or more cracks occurred in the electrically insulating substrate layer during the production step, analyzing the crack information, and performing one or more of the following after analyzing the crack information: performing a subsequent production step of the power semiconductor module dependent upon the analyzed crack information, cataloging the analyzed crack information, and performing a further investigative step to inspect the electrically insulating substrate layer using the analyzed crack information.


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