Memory package performing training operation using address-delay mapping and memory system including the same

Abstract

A memory package includes a data input/output pin, a data strobe pin, a plurality of memory devices, and a buffer device. The data input/output pin receives a data signal. The data strobe pin receives a data strobe signal. The plurality of memory devices operate based on the data signal and the data strobe signal. The buffer device is between the data input/output pin, the data strobe pin and the plurality of memory devices, and performs a training operation based on training data and the data strobe signal in response to the data signal including the training data and the data strobe signal being received. During the training operation, the buffer device sets different delays on a plurality of sub-training data included in the training data, and the sub-training data on which the different delays are set are stored in different memory regions of the plurality of memory devices.