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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12431081 B1

PDFFull Text
Date of Patent:
Sep. 30, 2025

Filed:

Sep. 13, 2023

Display device

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Jang Mi Kang, Seoul, KR;

Ji Sun Kim, Seoul, KR;

Mu Kyung Jeon, Ulsan, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:

Innovation Counsel LLP

Primary Examiner:

Insa Sadio

Int. Cl.
CPC ...
G09G 3/20 (2006.01); G09G 3/3233 (2016.01); G09G 3/3258 (2016.01); G09G 3/3266 (2016.01); G09G 3/3283 (2016.01); G09G 3/3291 (2016.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01); H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G09G 3/3258 (2013.01); G09G 3/3266 (2013.01); G09G 3/3283 (2013.01); G09G 3/3291 (2013.01); H10D 86/421 (2025.01); H10D 86/423 (2025.01); H10D 86/441 (2025.01); H10D 86/471 (2025.01); H10D 86/481 (2025.01); H10D 86/60 (2025.01); G09G 2300/0426 (2013.01); G09G 2300/043 (2013.01); G09G 2310/0264 (2013.01); H10K 59/12 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02);
Abstract

A display device including a light-emitting diode, a first transistor, a second transistor, a data line connected to the second transistor and configured to transmit a data signal, a third transistor, a first signal line connected to a gate electrode of the second transistor and configured to transmit a first signal, a second signal line connected to a gate electrode of the third transistor and configured to transmit a second signal, and a connect portion connected to a gate electrode of the first transistor and an electrode of the third transistor, in which the connect portion overlaps the first signal line and the second signal line, and an overlapping area between the connect portion and the first signal line is different from an overlapping area between the connect portion and the second signal line.

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