The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Feb. 09, 2023
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Subhra Mazumdar, Palo Alto, CA (US);

Guoyao Feng, Palo Alto, CA (US);

Neal Sanghvi, Palo Alto, CA (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/20 (2006.01); G06F 12/06 (2006.01); G06F 13/38 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); G06F 12/0653 (2013.01); G06F 13/382 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/3808 (2013.01);
Abstract

A data processing system is presented that includes multiple local buses, a host processor, a network interface controller (NIC) for connecting to external storage via a network, one or more reconfigurable processors, and a bus switch. The bus switch couples the multiple local busses, thereby operatively coupling the one or more reconfigurable processors, the host processor, and the NIC. The one or more reconfigurable processors are configured to implement a virtual function that uses a virtual address for a memory access operation. The host processor is configured to implement an application programming interface (API) that translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct data access operation at the external storage that moves data directly between the one or more reconfigurable processors and the external storage, wherein the data bypasses the host processor.


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