Hierarchical task scheduling for accelerators

Abstract

Apparatus and methods are disclosed for scheduling tasks in a heterogeneous computing environment. Coarse scheduling of a received task-set is performed centrally, with tasks dispatched to respective processing resources including one or more accelerators. At each accelerator, sub-tasks of a received task are identified, scheduled, and executed. Data-transfer and computation sub-tasks can be pipelined. The accelerator operates using small tiles of local data, which are transferred to or from a large shared reservoir of main memory. Sub-task scheduling can be customized to each accelerator; coarse task scheduling can work on larger tasks; both can be efficient. Simulations demonstrate large improvements in makespan and/or circuit area. Disclosed technologies are scalable and can be implemented in varying combinations of hard-wired or software modules. These technologies are widely applicable to high-performance computing, image classification, media processing, wireless coding, encryption, and other fields.