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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12429969 B1

PDFFull Text
Date of Patent:
Sep. 30, 2025

Filed:

May. 14, 2024

Flexible organic light emitting display device and method of manufacturing the same

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Hyunchul Kim, Hwaseong-si, KR;

Seongjun Lee, Seoul, KR;

Seongryong Lee, Hwaseong-si, KR;

Wonsuk Choi, Seoul, KR;

Yoonsun Choi, Hwaseong-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:

F. CHAU & ASSOCIATES, LLC

Primary Examiner:

Brian M Butcher

Int. Cl.
CPC ...
G06F 3/041 (2006.01); G02B 5/30 (2006.01); G06F 3/047 (2006.01); H10K 50/805 (2023.01); H10K 50/84 (2023.01); H10K 59/122 (2023.01); H10K 59/124 (2023.01); H10K 59/38 (2023.01); H10K 71/00 (2023.01); H10K 77/10 (2023.01); H10K 59/131 (2023.01); H10K 59/40 (2023.01); H10K 59/80 (2023.01);
U.S. Cl.
CPC ...
G06F 3/0412 (2013.01); G02B 5/3025 (2013.01); G06F 3/047 (2013.01); H10K 50/805 (2023.02); H10K 50/84 (2023.02); H10K 59/122 (2023.02); H10K 59/124 (2023.02); H10K 59/38 (2023.02); H10K 71/00 (2023.02); H10K 77/111 (2023.02); H10K 59/131 (2023.02); H10K 59/40 (2023.02); H10K 59/8791 (2023.02);
Abstract

An OLED device includes a substrate having a display region including a pixel region and first and second peripheral regions surrounding the pixel region. A bending region is between the display region and the second peripheral region. A buffer layer has a first opening exposing an upper surface of the substrate. A plurality of pixel structures is disposed in the pixel region on the buffer layer. An insulation layer structure is disposed on the buffer layer. The insulation layer structure has a second opening exposing an upper surface of the substrate that is disposed in the bending region and a first portion of the buffer layer that is disposed adjacent to the bending region. A fan-out wiring is disposed between two adjacent insulation layers of the plurality of insulation layers. The fan-out wiring is disposed in the first peripheral region and/or the second peripheral region.

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