The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Oct. 05, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Hyunae Park, Yongin-si, KR;

Okkyung Park, Yongin-si, KR;

Changsik Kim, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01); H10K 59/121 (2023.01); H10K 59/122 (2023.01); H10K 102/00 (2023.01); H10K 102/10 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); H10D 86/441 (2025.01); H10D 86/60 (2025.01); H10K 59/1213 (2023.02); H10K 59/122 (2023.02); H10K 2102/101 (2023.02); H10K 2102/311 (2023.02);
Abstract

A display panel includes: a display area including: a first display area having a plurality of first light-emitting elements; a second display area having a plurality of second light-emitting elements and a transmission area; and a third display area having a plurality of third light-emitting elements; a peripheral area at an outer side of the display area and comprising a bending area; a plurality of first sub-pixel circuits in the first display area and electrically connected to the plurality of first light-emitting elements, respectively; a plurality of second sub-pixel circuits electrically connected to the plurality of second light-emitting elements, respectively; and a plurality of third pixel circuits electrically connected to the plurality of third light-emitting elements, respectively, wherein the plurality of second sub-pixel circuits are in the peripheral area, and the bending area is between the plurality of second sub-pixel circuits and the display area.


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