The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Jul. 28, 2022
Applicant:

Auo Corporation, Hsinchu, TW;

Inventors:

Shih-Hsiung Lin, Hsinchu, TW;

Yang-En Wu, Hsinchu, TW;

Assignee:

AUO Corporation, Hsinchu, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H10H 20/857 (2025.01); H10H 20/01 (2025.01);
U.S. Cl.
CPC ...
H10H 20/857 (2025.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/81 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/014 (2013.01); H10H 20/0364 (2025.01);
Abstract

A light-emitting diode element includes a first-type semiconductor layer, a second-type semiconductor layer, an active layer, an insulating layer, a first electrode, a second electrode, a first passivation layer, a first seed layer, a first electroplating layer, a first solder and second solder. The insulating layer covers a sidewall of the first-type semiconductor layer, a sidewall of the second-type semiconductor layer and a sidewall of the active layer. The first passivation layer covers a portion of the insulating layer on the sidewall of the first-type semiconductor layer, the sidewall of the second-type semiconductor layer and the sidewall of the active layer. The first seed layer is disposed on the first passivation layer. The first electroplating layer is disposed on the first seed layer. The first solder and the second solder are electrically connected to a first conductive pattern and a second conductive pattern of the first electroplating layer.


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