Semiconductor memory device

Abstract

A semiconductor memory device includes: a device isolation pattern provided on a substrate to provide a first active portion and a second active portion; a first storage node pad disposed on the first active portion; a second storage node pad disposed on the second active portion; a pad separation pattern disposed between the first and second storage node pads; a word line disposed in the substrate to cross the first and second active portions; a bit line disposed on the pad separation pattern and crossing the word line; a buffer layer disposed on the pad separation pattern; and a mask polysilicon pattern interposed between the buffer layer and the bit line, wherein a side surface of the mask polysilicon pattern is substantially aligned to a side surface of the bit line, and the mask polysilicon pattern is vertically overlapped with the pad separation pattern.