The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Jun. 30, 2022
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Sebastian Turullols, Los Altos, CA (US);

Naga Murali Narasimha Rao Medeme, Hyderabad, IN;

Ravinder Sharma, Hyderabad, IN;

Jayaram Pvss, Hyderabad, IN;

Indlamuri Hemanth Kumar, Guntur, IN;

Kaustuvmani Manji, Hyderabad, IN;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/3203 (2019.01); G06F 1/3206 (2019.01); G06F 1/3212 (2019.01); G06F 1/3287 (2019.01); H04W 52/02 (2009.01);
U.S. Cl.
CPC ...
H04W 52/0274 (2013.01); G06F 1/3203 (2013.01); G06F 1/3206 (2013.01); G06F 1/3212 (2013.01); G06F 1/3287 (2013.01); H04W 52/0251 (2013.01);
Abstract

Methods and systems to manage an environmental condition, such as power consumption and/or temperature, of an integrated circuit (IC) device by controlling a bandwidth of a packet-based communication interface of the IC device (e.g., a PCIe interface). Bandwidth may be controlled by controlling delay between packets or controlling delay of a handshake signal. Delay may be increased when the environmental condition reaches a first threshold. Delay may be reduced when the environmental condition falls to a second threshold. Bandwidth may be regulated with proportional-integral control provided by a firmware controller and/or hardware. Bandwidth may be separately controlled for upstream and downstream paths based on bandwidth utilization of the respective paths. Bandwidth control may utilize codes stored in selectable registers. The IC device may include a field programmable gate array (FPGA) and may be configured as an accelerator card.


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