The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2025
Filed:
Mar. 01, 2021
Hewlett-packard Development Company, L.p., Spring, TX (US);
Steven T. Castle, Corvallis, OR (US);
David B. Novak, Corvallis, OR (US);
Choon Leng Tan, Singapore, SG;
Elijah Houle, Vancouver, WA (US);
Paul Jeran, Boise, ID (US);
Stephen Panshin, Corvallis, OR (US);
Hewlett-Packard Development Company, L.P., Spring, TX (US);
Abstract
A logic circuit, or method using the same, may include a memory storing (i) a plurality of partition groups, each partition group including a plurality of partitions, and (ii) a partition map defining an address and access mode for each of said partitions, defining different access modes for at least some of the partitions. The plurality of partition groups may comprise (i) a general use partition group including a first consumable level counter; (ii) a second use partition group including a second incrementally updatable consumable level counter; and (iii) a guide partition group including a use indicator to indicate which of the first and second consumable level counters to use.