The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Mar. 31, 2022
Applicant:

Raytheon Company, Waltham, MA (US);

Inventors:

Jarrod Vaillancourt, South Hampton, NH (US);

Matthew C. Tyhach, Wakefield, MA (US);

Assignee:

Raytheon Company, Arlington, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/29 (2013.01); H01L 25/50 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/08148 (2013.01); H01L 2924/10254 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/1423 (2013.01);
Abstract

Described herein is an apparatus and a method for thermal management. The apparatus includes an integrated circuit (IC) including at least one field effect transistor, wherein each at least one FET comprises a gate, a drain, and a source; and a diamond substrate bonded to the gate, the drain, and the source of each of the at least one FETs, wherein the diamond substrate includes at least one tuning element. The method includes forming at least one FET on an IC, wherein each at least one FET comprises a gate, a drain, and a source; and bonding a diamond substrate to the gate, the drain, and the source of each of the at least one FETs, wherein the diamond substrate includes at least one tuning element.


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