Shifting register with fewer transistors, driving method, gate driving circuit and display device

Abstract

The present disclosure relates to the field of display, and discloses a shifting register, a driving method, a gate driving circuit and a display device. The shifting register includes: an input sub-circuit, coupled to a signal input terminal, a first clock signal terminal and a first node; a control sub-circuit, coupled to the first clock signal terminal, a second clock signal terminal, the signal input terminal, a first power terminal, a second power terminal and a second node, where the first power terminal or the second power terminal determines a potential of the second node under the control of the first clock signal terminal, the second clock signal terminal and the signal input terminal; and an output sub-circuit, coupled to the first power terminal, the second power terminal, the first node, the second node and a signal output terminal.