The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Mar. 18, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Piyush Tewari, Uttar Pradesh, IN;

Ananda Kishore Parasa, Telangana, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1484 (2013.01); G06F 11/0793 (2013.01); G06F 11/1438 (2013.01);
Abstract

A system for global system memory management unit (SMMU) fault handling including a peripheral device having a guest virtual machine (GVM), the peripheral device configured to access a memory (DDR) through a system memory management unit (SMMU), a hosted hypervisor associated with the peripheral device, the GVM, the SMMU and the memory (DDR), where upon identification of a faulty memory transaction and a global SMMU fault being issued, the hosted hypervisor configured to identify that a stream identifier (SID) associated with the global SMMU fault is assigned to the GVM, and the hosted hypervisor configured to reset the GVM only such that a full system restart is avoided.


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