The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2025
Filed:
Aug. 09, 2023
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 9/448 (2018.01); G06F 11/07 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 9/4498 (2018.02); G06F 11/0757 (2013.01); G06F 13/4027 (2013.01); G06F 13/4221 (2013.01);
Abstract
Provided herein is a PCIe interface device. The PCIe interface device may include a NOP DLLP generator configured to generate a No Operation (NOP) data link layer packet (DLLP) including event information representing an event in response to the occurrence of the event and a transmitter configured to transmit the NOP DLLP to an external device through a link including a plurality of lanes.
Jeon, Yong. (2025). Peripheral component interconnect express interface device and system including the same (U.S. Patent No. 12423183). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12423183
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile