Concurrent write data strobe and reference voltage calibrations

Abstract

An apparatus for performing a write data strobe concurrent with a reference voltage calibration is disclosed. A memory controller circuit is configured to convey a write clock signal to a memory. The memory controller circuit includes a calibration circuit configured to send a first command to memory to initiate a calibration of the write clock signal and, after an amount of time has elapsed, receive a calibration value from the memory. The memory controller further includes a delay circuit configured to apply a delay to the write clock signal, wherein the calibration circuit is configured to complete calibration of the write clock signal by adjusting the delay applied to the write clock signal in accordance with the calibration value. The calibration circuit is further configured to perform a reference voltage calibration concurrent with the calibration of the write clock signal.