Memory folding systems and methods for use in frequency based transforms

Abstract

A processing circuit for creating a frequency-based output data from sampled streaming analog input data that is provided in K-deep input data blocks where K is a number of samples per clock cycle. The system includes: a memory unit on the single chip to store data including the sampled streaming analog input data; a processing engine on the single chip that receives the incoming streaming data as a series of K-deep input data blocks and performs a portion a frequency transform on the incoming streaming data to produce processed data. The system also includes a memory controller that causes the processed data to initially be stored by column in the memory unit. The memory controller reads data in the memory out in a rotated manner, provides it to the processing engine so that processing engine creates new processed data and writes the new processed data back into the memory.