The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Sep. 29, 2023
Applicant:

SK Hynix Nand Product Solutions Corp., Rancho Cordova, CA (US);

Inventors:

Niels Reimers, Meadow Vista, CA (US);

Andrew Morning-Smith, Vancouver, CA;

Assignee:

SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/32 (2019.01); G06F 1/3234 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3275 (2013.01); G06F 1/3296 (2013.01);
Abstract

This application is directed to dynamic power management among multiple memory devices of an electronic system. A plurality of memory devices are coupled into a ring of memory devices, and passes a power data packet along a power control path that tracks the ring of memory devices continuously. During a current cycle, a first memory device receives the power data packet from an upstream memory device on the power control path, and the power data packet includes at least a system power level indicating total power consumption of the plurality of memory devices. The first memory device sets a current power level of the first memory device based on the received power data packet, updates the power data packet based on the current power level, and sends the updated power data packet to a downstream memory device on the power control path.


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