The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Aug. 31, 2023
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Venkatesh Guduri, Bangalore, IN;

Ganapathi Shankar, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/56 (2006.01); G05F 1/575 (2006.01); G05F 3/26 (2006.01); H03K 17/082 (2006.01); H03K 17/10 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05F 3/262 (2013.01); H03K 17/0822 (2013.01); H03K 17/102 (2013.01); H03K 17/687 (2013.01);
Abstract

A load current sensing circuit includes a sense leg including a sense transistor with a gate coupled to the output of a high-side gate driver, a feedback transistor, and a sense resistor coupled in series between a power supply and ground. An amplifier has differential inputs coupled to the sense leg and to an output, and an output coupled to the feedback transistor gate. A bias circuit has a first transistor coupled between the power supply voltage and the first bias voltage terminal, and a gate receiving, from a first leg, a first differential from the output voltage. A second leg in the amplifier bias circuit generates a gate voltage, for a second transistor coupled between ground and a second bias voltage terminal, that is at a second differential from a voltage at the first bias voltage terminal. The amplifier is biased between the first and second bias voltages.


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