The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2025

Filed:

Jan. 13, 2023
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventor:

Jin Ha Kim, Icheon-si Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); G11C 16/04 (2006.01); H10B 41/27 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); G11C 16/0483 (2013.01); H10B 41/27 (2023.02);
Abstract

There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The manufacturing method of the semiconductor memory device includes: stacking a plurality of first material layers and a plurality of second material layers over a preliminary doped semiconductor structure; forming a blocking insulating layer, a data storage layer, a tunnel insulating layer, and a channel layer, which penetrate the plurality of first and second material layers, and extend to the inside of the preliminary doped semiconductor structure; forming a slit penetrating the plurality of first and second material layers; forming a protective structure as a double layer or a single layer on a sidewall of the slit; and forming a doped channel contact layer which penetrates a portion of the preliminary doped semiconductor structure in a direction intersecting the channel layer, and is in contact with the channel layer.


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